AMD Zen 6 Medusa Point Beats Ryzen 9 9950X3D at 2.0 GHz in First Lenovo OEM Test

AMD’s Zen 6 engineering sample appeared on a Lenovo validation rig, outperforming the Ryzen 9 9950X3D in single-core Geekbench 7 testing. The 10-core chip running at 2.0 GHz scored 3,100 points, surpassing the 9950X3D’s 3,051 average. This marks the first OEM integration of Zen 6 silicon ahead of the expected CES 2027 announcement.

Zen 6 IPC Improvement

The architectural significance of the result stems from Zen 6’s instructions per clock improvement rather than clock speed advantages. AMD officially confirmed a 25–30% IPC gain over Zen 5, meaning the architecture completes substantially more work per clock oscillation. This improvement was corroborated by earlier Zen 6c EPYC Venice samples showing roughly 24% IPC gain in single-threaded tests. The wider decode pipeline with an 8-slot dispatch engine and TSMC’s N2P process node with Gate-All-Around transistors represent the primary architectural changes enabling this performance per clock.

OEM Validation Milestone

The appearance of a Lenovo-validated build represents a significant shift in the Medusa Point development timeline. The _Y suffix on the product code 100-000001713-32_Y denotes a build specifically destined for OEM partner integration testing, marking a later stage in the pre-launch pipeline than AMD’s internal engineering samples. This indicates physical system integration work is actively underway for laptop platforms.

Platform and Socket Changes

The new Medusa Point mobile APU family will utilize the FP10 BGA socket, which is approximately 6% larger than the current FP8 socket used in Ryzen AI 300 and 400-series laptops. This socket change requires OEMs including Lenovo to design new chassis thermal solutions, board layouts, and power delivery systems. AMD expects to formally announce the Ryzen AI 500 family at CES 2027, with retail availability anticipated in the first half of 2027.